32 bit instruction set - The Program Counter

[WhoKnowsWho]

Hello,
Why is the Program counter 8 bytes ahead of its current instruction? Is this ARM in particular ?
Isn't it supposed to be current instruction + 4  ?

Would like to understand why it is current instruction + 8
Would be really appreciated!

[CmP]

First answer to this stack overflow question has some explanations about it:
https://stackoverflow.com/questions/24091566/why-does-the-arm-pc-register-point-to-the-instruction-after-the-next-one-to-be-e

[WhoKnowsWho]

Thanks for the link.
I'm think i understand.
Ok 3 stage pipeline. (fetch, decode, execute)
So for each clock the PC gets incremented by 4. Two clocks(fetch, decode) already happened before the execution.

So it should look like this? :

0x00000032 LDR R0, [PC,#68] -- execute +0 ; PC current instruction
0x00000036 LDR R0, [PC,R0] --decode +4
0x0000003A LDR R0, [R0] -- fetch +8 ; The fetch instruction which the PC is on

So PC is two instructions a head of its original value.