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ARM Post indexing addressing mode!


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1 hour ago, NoFear said:

I feel the arm instruction set you have isn't correct.

Give original hex from that instruction set.

Also, link given above is good.

And here

http://www.keil.com/support/man/docs/armasm/armasm_dom1361289850039.htm

No.Instruction is absolutely correct !

Here ARM v7 Hex  for this instruction is : 820191E6

and equivalent ARM v7 Thumb instruction for this is :  

LSLS R2, R0, #6

B #0xFFFFFD28 

@NoFear

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1 hour ago, Un_Known said:

No.Instruction is absolutely correct !

Here ARM v7 Hex  for this instruction is : 820191E6

and equivalent ARM v7 Thumb instruction for this is :  

LSLS R2, R0, #6

B #0xFFFFFD28 

@NoFear

Site I use wasn't putting it back to hex for whatever reason. Odd....

Edit: it's not ARMV7. that's why. It's thumb.

Need to pick the correct arm assembly. It's not both. It's either v7, v7 thumb or armv8/64.

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5 hours ago, NoFear said:

Site I use wasn't putting it back to hex for whatever reason. Odd....

Edit: it's not ARMV7. that's why. It's thumb.

Need to pick the correct arm assembly. It's not both. It's either v7, v7 thumb or armv8/64.

No! I think take a look. The instruction i shared was v7 ARM and it's legitimate one but i want to understand this particular example only because i know the concept of post indexing addressing but this particaular example is giving me hard time!

I read guide and references but couldn't find clue to it!

This is bit difficult than others hope somebody would help!

Screenshot_Puffin_20190702-071230.thumb.png.99e13f552c2e7e7b10bdec428dc5ba5e.png

 

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45 minutes ago, Un_Known said:

Sorry bit of confusion was there

correction 

LDR r2,[r1],r0,lsl#3 = 802191E6

LDR R0,[R1],R2,LSL#3 = 820191E6

just want to know what is happening in this particular example

Screenshot_Puffin_20190702-071230.png

Screenshot_Puffin_20190702-082836.png

I'm thinking it's Thumb....  You are getting a hex result, but it's saying conversion failed. 

The 802.... Hex

MOVS    R1, #0x80
B    #0xFFFFFD28
 

Is moving 128 to R1

 

Your 820820191E6 hex

LSLS    R2, R0, #6
B    #0xFFFFFD28

 

Quote

 

16-bit instructions

The following forms of this instruction are available in Thumb code, and are 16-bit instructions:

LSLS Rd, Rm, #sh

Rd and Rm must both be Lo registers. This form can only be used outside an IT block

 

 

 

Edit:

LSL

Logical Shift Left. This instruction is a preferred synonym for MOV instructions with shifted register operands.

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